Aspects of this application relate in general to electronic circuitry and in particular to methods and circuitry for optimizing the performance of ADCs. Recently ADCs are increasingly used for receiving signals in highly integrated circuits, which may form a single chip solution for a particular system. These integrated circuits typically have several functional blocks which together form a complete system, and are sometimes called a “System on a Chip” or “SOC.” Use of SOCs reduces the number of components, the board area, and the interconnections between packaged integrated circuits on a circuit board, thereby increasing performance and reliability and reducing the size of the components. ADCs are particularly useful on an SOC in an application that has a communication interface such as a cellphone, WiFi connected tablet, and Bluetooth connected devices such as music players and portable speakers, cameras, camcorders and the like. In addition ADCs are used for integrated circuits arranged to receive sensor data, such as SOCs for thermostats, temperature, pressure, light, motion and sound sensing, automotive applications such as airbags, anti-locking brake systems, speed controls and the like. In other applications, voice recognition is performed with the human voice as an analog input signal. As the digital processing of signals that originate as analog signals becomes increasingly pervasive, the use of ADCs also increases.
Increasingly, portable devices that are completely or partially battery powered are implemented using ADC circuitry. Examples include cellphones, wireless or WiFi connected tablets, laptop computers, PDAs and the like. The need for power efficient circuitry is therefore increasing, as the battery life between charges is affected by the power consumed by the circuitry for the various functions.
Prior known ADC circuits are designed conservatively with sufficient design margin to ensure proper operations. In designing a synchronous ADC system, “worst case” scenarios of the input signal are typically used. For example, the bandwidth for the analog input signal of an ADC is assumed to be the maximum bandwidth of all possible input signals. The sampling rate in a synchronous ADC is then designed to meet or exceed the Nyquist rate, which is at least 2× the maximum frequency of the input signal. However, in practice the input signal may have a much different bandwidth at different time instants. Many input signals have long periods of relatively low frequency, followed by short periods of higher frequency signaling due to a change in environmental factors. Examples include human speech, which has greatly varying frequency content, and FM signals, which have a frequency content that varies greatly with baseband signal strength. Other systems include sensors which may transmit relatively low bandwidth signals until an event occurs, followed by a period of high bandwidth signaling. By designing ADCs to operate in the “worst case” situation, the power consumed (which, for MOS semiconductor devices, strongly correlates to the switching frequency) is increased and the power consumed is independent of the actual characteristics of the analog input signal.
In the prior known solutions, it has been recognized that the power consumed can be greatly reduced if signal processing circuits which follow the analog to digital converter stage are adapted to operate according to the actual frequency characteristics of the input signal. This reduction in power consumption can be attained for both asynchronous and synchronous ADCs.
In the prior known solutions, the frequency content or bandwidth of the input signal could be estimated using a full or fast Fourier transform. However, this approach requires a computationally expensive hardware and/or software solution to perform the Fourier analysis. Further this approach is applicable to uniform sampling systems, but not to all sampling systems.
In another prior known approach, a zero crossing detector can be applied to the input signal and the frequency content can be estimated from the zero crossings. However, DC offsets in the analog input signal must be compensated for. If this is not done, then, the zero crossing solution will be in error. Further, the power needed for implementing a zero crossing detector is large, frustrating the goal of reducing the power consumption in the system.
Improvements in the operations of ADC converters are therefore needed in order to address the deficiencies and the disadvantages of the prior known approaches. Solutions are needed that reduce the power consumption for the ADC operations, and which improve the overall system performance, for example in terms of performance metrics such as the signal to noise ratio (SNR) and both active and standby power consumption.